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Question 310

In Figure E6-3, which is the schematic symbol for a NAND gate?

Six schematic symbols of digital logic elements, numbered 1 through 6.
  1. 1
  2. 2Bonne réponse
  3. 3
  4. 4

Explication

Symbol 2 has the flat input side and semicircular output end of an AND gate with an inversion bubble on its output, which is exactly a NAND. Symbol 1 is the same body without the bubble and is a plain AND, symbol 3 is the curved-back OR body, and symbol 4 is that OR body with a bubble, making it a NOR.

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